Index

A | B | C | D | E | I | P | Q | S | U

A

  • AMP

B

  • Book III-E
  • boot CPU
  • boot program

C

  • cell
  • client program

D

  • DMA
  • DTB
  • DTC
  • DTS

E

  • effective address

I

  • interrupt specifier

P

  • physical address
  • Power ISA

Q

  • quiescent CPU

S

  • secondary CPU
  • SMP
  • SoC

U

  • unit address

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Devicetree Specification

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  • 2. The Devicetree
  • 3. Device Node Requirements
  • 4. Device Bindings
  • 5. Flattened Devicetree (DTB) Format
  • 6. Devicetree Source (DTS) Format (version 1)

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  • Documentation overview

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